Kirjoittaja PetriK » 13 Marras 2007, 18:42
Olisiko tässä koodilogiikan alkua ??? Syntaksi on pielessä kun en vaan enään muista, mutta logiikkaan kaipaisin kommentteja. Noi bittikäsittelyfunktiot ei vielä ole tässä.
/*
This program is supposed to send a memory address to the AUD line and get in return the contents of that memory address. It assumed that AUDCLK signal is produced by a processor timer and that for each timer pulse an interrupt is generated.
This is a draft for commenting.
Please do not pay attention to the syntax I just dont remember anymore how to write C. I am more concerned of the logic, propalbly this has some flaws, but maybe some ideas can be generated based on this.
The logic is very simple and communications just uses seven one bit registers (PB0..PB6):
- PB5 (AUDCLK) is a clock signal that is programmed going up and down with a small inbuilt delay. I dont know if this should be synchronized with a clock or if it can vary a lot. But as it is used for reading and writing I would assume it not being so citical to have an exact pulsewidth on this.
- Set PB5 (DIRection) down to write to the bus
- Set PB4 (AUDSYNCinverted) down to start reading
- Send to the bus PB0,PB1,PB2,PB3 (AUDATA) a dummybit 0000 to start the sequence
- Wait for next PB5 cycle
- Send to the bus PB0,PB1,PB2,PB3 (AUDATA) a command 1010, i.e. read from memory
- Send to the bus PB0,PB1,PB2,PB3 (AUDATA) the memory address e.g. 0xffffc000 4 bits at a time by each PB5 clock pulse
- Set PB6 (DIRection) up
- Wait from the bus PB0,PB1,PB2,PB3 (AUDATA) to receive readyflag bits 0001: wait for each clockpulse until changed.
- Set PB4 (AUDSYNCinverted) up as a signal that we are ready to start reading the memory contents
- Read from the bus PB0,PB1,PB2,PB3 (AUDATA) the memory content, e.g. 0x01234567, four bits at a time.
*/
/* global variables */
boolean AUD_ADDR[7,3] /* table which is used for generating the AUD signals for
writing the memory address to the AUD bus */
boolean AUD_RESULT[7,3] /* table which is used for storing the AUD the result of the memory byte reading */
int AUD_PTR /* which step on write / read process we have ongoing */
boolean showLCD;
boolean AUD_PROCESS; /* indicates when AUD process can be started */
Interrupt_AUDCLK_signal(){ /* this is an interrupt that is executed on each clock signal, falling edge ??
This function is the brain that handles the AUD line and just uses global variables to store the results */
/* Write the memory address to the bus */
Case AUD_ PTR
1: PB6=1; PB0=1;PB1=1;PB2=1;PB3=1;/*write dummybit*/
2: PB0=1;PB1=0;PB2=1;PB3=0; /*write command 1010 */
3,4,5,6,7,8,9,10: /* write address bits 3:0 */
{ PB0=AUD_ADDR[AUD_ PTR-3,0]; PB1=AUD_ADDR[AUD_ PTR-3,1];
PB2=AUD_ADDR[AUD_ PTR-3,2]; PB3=AUD_ADDR[AUD_ PTR-3,3];}
11: PB6=1; /*Change direction*/
/* Increase pointer if either still writing to the bus or AUDSYNC enabled, or just wait until AUDSYNC is enabled */
if (AUD_ PTR < 11 & AUDSYNC != 1) AUD_ PTR++;
/* Read the memory byte contents from the bus */
Case AUD_PTR 12,13,14,15,17,18,19,20: /*read memory contents */
{ AUD_RESULT[AUD_PTR-12,0]=PB0; AUD_RESULT[AUD_PTR-12,1]=PB1;
AUD_RESULT[AUD_PTR-12,2]=PB2; AUD_RESULT[AUD_PTR-12,3]=PB3;}
/* If memory byte read into the memory let the main function know that audprocess stopped */
if AUD_PTR >= 20 { stop_AUDCLK_signal();AUD_PROCESS=false;AUD_PTR=0; show_LCD=True;}
if (AUD_PTR >= 12 & AUDSYNC == 1) AUD_PTR++; /* increase pointer further only when AUDSYNC is high */
}
initialize_AUDCLK_signal(){
/* to be written, based on processor register handling, just set the timer based signal on */
/* the frequency is max processor speed / 4 or slower than execution of interrupt subroutine on this program */
}
stop_AUDCLK_signal(){
/* to be written, based on processor register handling, just set the timer based signal off */
}
Initialize(){
/* to be written, based on processor register handling */
/*
set ports
set AUDCLK signal to 1khz ?
*/
AUD_PROCESS=True;
AUD_PTR=0;
show_LCD=False;
}
Main() /* very dummy main program, just process a fixed address and show it on the LCD once */
int xxx;
{
while (1) {
if (AUD_PROCESS & AUD_PTR==0 ){ /* start timer to output AUDCLK signal *
convert_to_bits(0xFFFFC3000); /* converts input to AUD_ADDR table */
initialize_AUDCLK_signal();
}
if (!AUD_PROCESS & show_LCD) {
xxx=bits_to_value(); /* read the AUD_result table to xxx */
send_to_LCD(xxx); /*send data to LCD to view the result*/
show_LCD=False; /* just show once */
}}}
Edited By PetriK on 1194974391
[color=#000000]Olisiko tässä koodilogiikan alkua ??? Syntaksi on pielessä kun en vaan enään muista, mutta logiikkaan kaipaisin kommentteja. Noi bittikäsittelyfunktiot ei vielä ole tässä.
/*
This program is supposed to send a memory address to the AUD line and get in return the contents of that memory address. It assumed that AUDCLK signal is produced by a processor timer and that for each timer pulse an interrupt is generated.
This is a draft for commenting.
Please do not pay attention to the syntax I just dont remember anymore how to write C. I am more concerned of the logic, propalbly this has some flaws, but maybe some ideas can be generated based on this.
The logic is very simple and communications just uses seven one bit registers (PB0..PB6):
- PB5 (AUDCLK) is a clock signal that is programmed going up and down with a small inbuilt delay. I dont know if this should be synchronized with a clock or if it can vary a lot. But as it is used for reading and writing I would assume it not being so citical to have an exact pulsewidth on this.
- Set PB5 (DIRection) down to write to the bus
- Set PB4 (AUDSYNCinverted) down to start reading
- Send to the bus PB0,PB1,PB2,PB3 (AUDATA) a dummybit 0000 to start the sequence
- Wait for next PB5 cycle
- Send to the bus PB0,PB1,PB2,PB3 (AUDATA) a command 1010, i.e. read from memory
- Send to the bus PB0,PB1,PB2,PB3 (AUDATA) the memory address e.g. 0xffffc000 4 bits at a time by each PB5 clock pulse
- Set PB6 (DIRection) up
- Wait from the bus PB0,PB1,PB2,PB3 (AUDATA) to receive readyflag bits 0001: wait for each clockpulse until changed.
- Set PB4 (AUDSYNCinverted) up as a signal that we are ready to start reading the memory contents
- Read from the bus PB0,PB1,PB2,PB3 (AUDATA) the memory content, e.g. 0x01234567, four bits at a time.
*/
/* global variables */
boolean AUD_ADDR[7,3] /* table which is used for generating the AUD signals for
writing the memory address to the AUD bus */
boolean AUD_RESULT[7,3] /* table which is used for storing the AUD the result of the memory byte reading */
int AUD_PTR /* which step on write / read process we have ongoing */
boolean showLCD;
boolean AUD_PROCESS; /* indicates when AUD process can be started */
Interrupt_AUDCLK_signal(){ /* this is an interrupt that is executed on each clock signal, falling edge ??
This function is the brain that handles the AUD line and just uses global variables to store the results */
/* Write the memory address to the bus */
Case AUD_ PTR
1: PB6=1; PB0=1;PB1=1;PB2=1;PB3=1;/*write dummybit*/
2: PB0=1;PB1=0;PB2=1;PB3=0; /*write command 1010 */
3,4,5,6,7,8,9,10: /* write address bits 3:0 */
{ PB0=AUD_ADDR[AUD_ PTR-3,0]; PB1=AUD_ADDR[AUD_ PTR-3,1];
PB2=AUD_ADDR[AUD_ PTR-3,2]; PB3=AUD_ADDR[AUD_ PTR-3,3];}
11: PB6=1; /*Change direction*/
/* Increase pointer if either still writing to the bus or AUDSYNC enabled, or just wait until AUDSYNC is enabled */
if (AUD_ PTR < 11 & AUDSYNC != 1) AUD_ PTR++;
/* Read the memory byte contents from the bus */
Case AUD_PTR 12,13,14,15,17,18,19,20: /*read memory contents */
{ AUD_RESULT[AUD_PTR-12,0]=PB0; AUD_RESULT[AUD_PTR-12,1]=PB1;
AUD_RESULT[AUD_PTR-12,2]=PB2; AUD_RESULT[AUD_PTR-12,3]=PB3;}
/* If memory byte read into the memory let the main function know that audprocess stopped */
if AUD_PTR >= 20 { stop_AUDCLK_signal();AUD_PROCESS=false;AUD_PTR=0; show_LCD=True;}
if (AUD_PTR >= 12 & AUDSYNC == 1) AUD_PTR++; /* increase pointer further only when AUDSYNC is high */
}
initialize_AUDCLK_signal(){
/* to be written, based on processor register handling, just set the timer based signal on */
/* the frequency is max processor speed / 4 or slower than execution of interrupt subroutine on this program */
}
stop_AUDCLK_signal(){
/* to be written, based on processor register handling, just set the timer based signal off */
}
Initialize(){
/* to be written, based on processor register handling */
/*
set ports
set AUDCLK signal to 1khz ?
*/
AUD_PROCESS=True;
AUD_PTR=0;
show_LCD=False;
}
Main() /* very dummy main program, just process a fixed address and show it on the LCD once */
int xxx;
{
while (1) {
if (AUD_PROCESS & AUD_PTR==0 ){ /* start timer to output AUDCLK signal *
convert_to_bits(0xFFFFC3000); /* converts input to AUD_ADDR table */
initialize_AUDCLK_signal();
}
if (!AUD_PROCESS & show_LCD) {
xxx=bits_to_value(); /* read the AUD_result table to xxx */
send_to_LCD(xxx); /*send data to LCD to view the result*/
show_LCD=False; /* just show once */
}}}[/color]
Edited By PetriK on 1194974391